ASAHI KASEI
[AKD4364]
<KM061301>
'00/4
- 1 -
GENERAL DESCRIPTION
The AKD4364 is an evaluation board for AK4364, 96kHz 24bit D/A converter with PLL & DIT. The
AKD4364 has a digital interface with AKM's wave generator using ROM data and AKM's A/D converter
evaluation boards. Therefore, it is easy to evaluate the AK4364.
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Ordering guide
AKD4364
---
Evaluation board for AK4364
(Cable for connecting with printer port of IBM-AT compatible PC
and control software are packed with this.)
FUNCTION
On-board clock generator
Compatible with 2 types of interface
- Direct interface with AKM's A/D converter evaluation boards
and direct interface with AKM's signal generator(AKD43XX) by 10pin header
- On-board CS8414 as DIR which accepts optical input
BNC connector for external clock input
10pin header for serial control interface
On-board mute circuit for analog output
Optical output for TX output
AK4364
2.7
5.5V
GND
Lch
CS8414
(DIR)
Clock
Generator
Opt Out
ROM
or A/D
10pin Header
Divider
Opt In
Rch
External
Clock
MCKO
MCKI
Control
10pin Header
Mute
DZF
Figure 1. AKD4364 Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
Evaluation board Rev.A for AK4364
AKD4364
ASAHI KASEI
[AKD4364]
<KM061301>
'00/4
- 2 -
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External analog circuit
J1(AOUTL) and J2(AOUTR) are used. The analog output signal range is nominally 3.1Vpp@5V. It is proportional
to AVDD (Vout=0.62xAVDD).
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Operation sequence
1) Set up the power supply lines.
[AVDD] (red)
= 2.7
5.5V
: for AVDD of AK4364
[3V] (orange)
= 2.7
5.5V
: for DVDD of AK4364
[5V] (red)
= 3.4
5.5V
: for logic
[AGND] (black) = 0V
: for analog ground (including AVSS and DVSS of AK4364)
[DGND] (black) = 0V
: for logic ground
Each supply line should be distributed from the power supply unit.
2) Set up the evaluation mode, jumper pins and DIP switches.
(See the followings.)
3) Power on.
The AK4364 should be reset once bringing SW1(-PD) "L" upon power-up.
4) Connect PORT2 with PC.
Connect PORT2 with printer port (parallel port) of IBM-AT compatible PC by 10-line flat cable packed with
the AKD4364. Take care of the direction of connector. There is a mark at 1pin. The direction of PORT2 is as
the following figure.
PORT2
CTRL
1
-CS
SCL/CCLK
SDA/CDTI
SDA(ACK)
2
9
10
5) Set up the software.
Use the software named "AKD4364 Control Program" packed with the AKD4364.
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Evaluation mode
1) Using A/D converted data <default>
PORT3 (ADC/ROM) is used to interface with various AKM's A/D converter evaluation boards. In case of
using external clock through a BNC connector (J4), select BNC on JP14 (CLK) and short JP15 (XTE).
JP12
DIR_DATA
JP14
CLK
JP6
LRCK
DIR
ADC
DIR
BNC
XTL
JP7
BICK
DIR
ADC
JP13
DIR
VD
GND
JP15
XTE
ASAHI KASEI
[AKD4364]
<KM061301>
'00/4
- 3 -
2) Ideal sine wave generated by ROM data
Digital signals generated by AKD43XX are used. PORT3 (ADC/ROM) is used to interface with AK43XX.
Master clock is sent from AKD4364 to AKD43XX and LRCK, BICK, SDTI are supplied from AKD43XX to
AKD4364. In case of using external clock through a BNC connector (J4), select "BNC" on JP14 (CLK) and
short JP15 (XTE).
JP12
DIR_DATA
JP14
CLK
JP6
LRCK
DIR
ADC
DIR
BNC
XTL
JP7
BICK
DIR
ADC
JP13
DIR
VD
GND
JP15
XTE
3) DIR(CS8414)
PORT4 (TORX174) is used for the evaluation using such as test disk. The DIR generates MCKI, BICK,
LRCK, SDTI from the received data through optical connector. In this case, the EXT bit of AK4364 should be
"1" (External clock mode). Select "RCA" or "OPT" on JP16 (RCA/OPT) in case of using RCA connector (J3)
or optical connector (PORT4: TORX174).
JP12
DIR_DATA
JP14
CLK
JP6
LRCK
DIR
ADC
DIR
BNC
XTL
JP7
BICK
DIR
ADC
JP13
DIR
VD
GND
JP15
XTE
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Clock (MCLK,BICK,LRCK) set up
In case of using evaluation mode 1), JP9,10 and 17 should be set up as follows.
They need no care for other evaluation mode.
MCLK
JP9
(X_MCLK)
JP10
(X_LRCK)
BICK
JP17
(X_BICK)
128fs
x1
x1/128
32fs
64fs
128fs
x1/4
x1/2
x1
256fs
x1
x1/256
32fs
64fs
128fs
x1/8
x1/4
x1/2
default
512fs
x2
x1/256
32fs
64fs
128fs
x1/8
x1/4
x1/2
1024fs
x4
x1/256
32fs
64fs
128fs
x1/8
x1/4
x1/2
Table 1. Clock set up
ASAHI KASEI
[AKD4364]
<KM061301>
'00/4
- 4 -
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DIP switch (SW2) set up
No.1 to 5 set the mode of AK4364 and No.6 to 8 set the mode of CS8414.
No.
Pin
OFF <default>
ON
1
CAD1
2
CAD0
Chip address (2bit)
3
I2C
3-wire serial
I2C bus
4
TTL
CMOS level
TTL level
5
TST
always "OFF"
-
6
M2
7
M1
8
M0
Digital interface format of CS8414
(See table 3.)
(Note)
Table 2. DIP switch set-up
(Note: M2-0 should be selected at only evaluation mode 3.
In other mode, these should be "OFF".)
Mode
Format
M2
M1
M0
JP9
DIF2
DIF1
DIF0
0
16bit, LSB justified
1
0
1
THR
0
0
0
1
18bit, LSB justified
1
1
0
THR
0
0
1
2
20bit, LSB justified
-
-
-
-
0
1
0
3
24bit, LSB justified
-
-
-
-
0
1
1
4
24bit, MSB justified
0
0
0
INV
1
0
0
5
I2S
0
1
0
THR
1
0
1
Table 3. Digital interface format set-up
(Note: 1="ON", 0="OFF".
DIF2-0 should be selected by serial control.
CS8414 does not correspond to 20/24bit LSB justified format.)
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Serial control mode
The AK4364 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT2
(CTRL) with PC by 10-line flat cable packed with the AKD4364.
There are two modes: 3-wire serial & I2C bus. JP4 should be shorted at 3-wire serial control mode.
Chip address can be selected by SW2(MODE)-No.1(CAD1) and No.2(CAD0).
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Other jumper pins set up
[JP1](GND): Analog ground and digital ground
Open: Separated <default>
Short: Common (The connector "DGND" can be open.)
[JP2](5V-3V): DVDD of AK4364 and power supply to logic
Open: Independent <default>
Short: Same (The connector "3V" should be open.)
ASAHI KASEI
[AKD4364]
<KM061301>
'00/4
- 5 -
[JP3](DVDD): DVDD of AK4364
3V:
Independent of AVDD <default>
AVDD: Same as AVDD (The connector "3V" can be open.)
[JP5](DZF): Mute circuit
ON:
Used (Analog output is muted when DZF="H".) <default>
OFF:
Not used
[JP11](SDTI): SDTI of AK4364
DATA: Data is input <default>
GND:
"0" data is input
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The function of the toggle SW (SW1)
Upper-side is "H" and lower-side is "L".
[SW1] (-PD): Resets the AK4364. Keep "H" during normal operation.
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The indication content for LED
[LED1] (VERF):
Monitors VERF pin of the CS8414. LED turns on when some error has occurred to CS8414.
[LED2] (PREM): Indicates whether the input data is pre-emphasis or not.
LED turns on when the data is pre-emphasised.
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